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International Journal on Smart Sensing and Intelligent Systems

Professor Subhas Chandra Mukhopadhyay

Exeley Inc. (New York)

Subject: Computational Science & Engineering, Engineering, Electrical & Electronic


eISSN: 1178-5608



VOLUME 10 , ISSUE 3 (September 2017) > List of articles


P. Visconti * / G. Giannotta * / R. Brama * / P. Primiceri * / R. de Fazio * / A. Malvasi *

Keywords : IoT, communication protocols, smart objects, FlexSPI, software procedures, shared bus, PIC.

Citation Information : International Journal on Smart Sensing and Intelligent Systems. Volume 10, Issue 3, Pages 506-550, DOI: https://doi.org/10.21307/ijssis-2017-222

License : (CC BY-NC-ND 4.0)

Received Date : 25-May-2017 / Accepted: 17-July-2017 / Published Online: 01-September-2017



In this paper, we report on hardware structure, operation mode and software development for a new advanced communication protocol whose aim is obtaining a fully shared SPI bus with a fixed amount of wires, without renouncing to advantages of a push-pull output stage and obtaining an architecture capable of great flexibility. All four signals of a classic SPI protocol are entirely shared by the slaves on bus: when a master wants to communicate with a particular device, it will perform an addressing at packet level: starting from its main characteristics, various adopted solutions to realize a shared SPI bus will be analyzed, explaining how a communication session is performed. The firmware structure was designed as a software stack composed by interacting layers, tracing model of similar protocols that share with FlexSPI some features. Some of the advanced procedures that can be performed thanks to this protocol will be discussed, highlighting the suitability of FlexSPI for dynamic smart objects; in fact, by adding these features to developed framework, it is possible to explore and appreciate expandability of this communication protocol, making it suitable to meet advanced IoT requirements of smart objects. FlexSPI can be built like a MAC layer above the SPI bus, to process all necessary pieces of information to perform the packet level addressing, using a stack having a layered architecture. This is idea followed in the firmware development, to implement this communication protocol, experimentally verified in the performed and reported communication tests, confirming that it is possible to obtain a shared push-pull bus.

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