Search

  • Select Article Type
  • Abstract Supplements
  • Blood Group Review
  • Call to Arms
  • Communications
  • Hypothesis
  • In Memoriam
  • Interview
  • Introduction
  • Letter to the Editor
  • Short Report
  • abstract
  • Abstracts
  • Article
  • book-review
  • case-report
  • case-study
  • Clinical Practice
  • Commentary
  • Conference Presentation
  • conference-report
  • congress-report
  • Correction
  • critical-appraisal
  • Editorial
  • Editorial Comment
  • Erratum
  • Events
  • in-memomoriam
  • Letter
  • Letter to Editor
  • mini-review
  • minireview
  • News
  • non-scientific
  • Obituary
  • original-paper
  • original-report
  • Original Research
  • Pictorial Review
  • Position Paper
  • Practice Report
  • Preface
  • Preliminary report
  • Product Review
  • rapid-communication
  • Report
  • research-article
  • Research Communicate
  • research-paper
  • Research Report
  • Review
  • review -article
  • review-article
  • review-paper
  • Review Paper
  • Sampling Methods
  • Scientific Commentary
  • serologic-method-review
  • short-communication
  • short-report
  • Student Essay
  • Varia
  • Welome
  • Select Journal
  • In Jour Smart Sensing And Intelligent Systems
  • International Journal Advanced Network Monitoring Controls

 

Article | 30-November-2018

Radix-8 Design Alternatives of Fast Two Operands Interleaved Multiplication with Enhanced Architecture

of processing. Computer arithmetic [4] or digital arithmetic is the science that combines mathematics with computer engineering and deals with representing integers and real values in digital systems and efficient algorithms for manipulating such numbers by means hardware circuitry and software routines. Arithmetic operations on pairs of numbers x and y include addition (s = x + y), subtraction (d = x – y), multiplication (p = x × y), and division (q = x/y). Subtraction and division can be viewed

Mohammad M. Asad, Ibrahim Marouf, Qasem Abu Al-Haija

International Journal of Advanced Network, Monitoring and Controls, Volume 4 , ISSUE 2, 15–27

Research Article | 01-June-2011

Vedic Mathematics Based 32-Bit Multiplier Design for High Speed Low Power Processors

P. Saha, A. Banerjee, A. Dandapat, P. Bhattacharyya

International Journal on Smart Sensing and Intelligent Systems, Volume 4 , ISSUE 2, 268–284

Article | 23-December-2013

DESIGN OF LINEAR-PHASE FILTER BANKS WITH MULTIPLIER-LESS LATTICE STRUCTURES

In this paper, a new multiplier-less algorithm is proposed for the design of perfect- reconstruction linear-phase (PR LP) filter banks by using multiplier-less lattice structures. The coefficients in the multiplication operations have been replaced with limited number of additions and the computational complexity is reduced significantly. The property of perfection reconstruction, however, is preserved regardless the multiplier-less approximation of lattice structures in the factorization of

Li Chen, Xiyan Wang, Ronghua Peng, Fu Yang

International Journal on Smart Sensing and Intelligent Systems, Volume 6 , ISSUE 5, 2234–2253

Research Article | 12-December-2017

FPGA-Based Implementation of Real Time Optical Flow Algorithm and Its Applications for Digital Image Stabilization

An efficient simplification procedure of the optical flow (OF) algorithm as well as its hardware implementation using the field programmable gate array (FPGA) technology is presented. The modified algorithm is based on block matching of subsets of successive frames, and exploits one-dimensional representation of subsets as well as the adaptive adjustments of their sizes. Also, an l1-norm-based correlation function requiring no multiplication/division operations is used. As a result, it was

Robert Piotrowski, Stanislaw Szczepanski, Slawomir Koziel

International Journal on Smart Sensing and Intelligent Systems, Volume 3 , ISSUE 2, 253–272

Article | 10-April-2018

Research on Tool Path Planning Method of NURBS Surface Based on CPU - GPU Parallel Computing

In order to deal with the inefficiency of trational serial tool path algorithms and incompatibility issues on the heterogeneous hardware platforms, this paper suggests a tool path planning method based on CPU-GPU(Central Processing Unit-Graphic Processing Unit) heterogeneous parallel computing. The method contra poses NURBS(Non-Uniform Rational B-Splines) surface which is abstracted as a matrix multiplication on the principle of isoparametric line tool path planning method. Then a parallel

Wujia Yu, Yangqiang Bi, Zhendong Li

International Journal of Advanced Network, Monitoring and Controls, Volume 2 , ISSUE 3, 45–48

No Record Found..
Page Actions